Small instruction fixup

src/f6502.c

@@ -771,7 +771,7 @@ static int f6502_do_step(f6502_Core* core, int clocks) {
 
         case 0x16:  // ASL zp, X
             ASL(A_ZPX);
-            CLK(4);
+            CLK(6);
             break;
 
         // Undefined: 0x17
@@ -1018,9 +1018,12 @@ static int f6502_do_step(f6502_Core* core, int clocks) {
         // Undefined: 0x57
 
         case 0x58:  // CLI
-        {   register uint8_t p_old = P;
+        {   //register uint8_t p_old = P;
             CLR(P, f6502_Status_I);
             CLK(2);
+            // TODO: Should this not be delayed one instruction?
+/*
+
             if (    (p_old & f6502_Status_I) &&
                     (core->interrupts & f6502_Int_IRQ)) {
                 CLK(7);
@@ -1030,7 +1033,7 @@ static int f6502_do_step(f6502_Core* core, int clocks) {
                 PC = f6502_read16(&core->memory,
                                   f6502_Vector_IRQ);
             }
-
+*/
         }   break;
 
         case 0x59:  // EOR abs, Y
@@ -1231,6 +1234,8 @@ static int f6502_do_step(f6502_Core* core, int clocks) {
             CLK(4);
             break;
 
+        // Undefined: 0x8F
+
         case 0x90:  // BCC
             BIF(!(P & f6502_Status_C));
             break;
@@ -1561,6 +1566,8 @@ static int f6502_do_step(f6502_Core* core, int clocks) {
             CLK(5);
             break;
 
+        // Undefined: 0xE7
+
         case 0xE8:  // INX
             ++X;
             TEST(X);
@@ -1643,6 +1650,8 @@ static int f6502_do_step(f6502_Core* core, int clocks) {
             CLK(7);
             break;
 
+        // Undefined: 0xFF
+
         /* "Special" i.e. "unofficial" instructions */
         /* Timing & progression only, no side effects */